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Espressif Systems /ESP32-S2 /I2S0 /SAMPLE_RATE_CONF

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Interpret as SAMPLE_RATE_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TX_BCK_DIV_NUM 0RX_BCK_DIV_NUM 0TX_BITS_MOD0RX_BITS_MOD

Description

I2S sample rate register

Fields

TX_BCK_DIV_NUM

Bit clock configuration bits in transmitter mode.
RX_BCK_DIV_NUM

Bit clock configuration bits in receiver mode.
TX_BITS_MOD

Set the bits to configure bit length of I2S transmitter channel, the value of which can only be 8, 16, 24 and 32.
RX_BITS_MOD

Set the bits to configure bit length of I2S receiver channel, the value of which can only be 8, 16, 24 and 32.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd